Data communication between two link partners or entities in a digital communication system may be accomplished according to the general configuration of FIG. 1. FIG. 1 is a diagram illustrating an embodiment of an existing multilane digital communication link. Referring to FIG. 1, there is shown a digital communication link 100, which may include transmitter side 101 and a receiver side 102. The transmitter side 101 may include a multi-lane encoder 103, a high-speed serializer 104 and a modulator 105. The receiver side 102 may include a demodulator 106, a high-speed de-serializer 107, and a multi-lane decoder 108. The transmitter side 101 and the receiver side 102 may be coupled by a link infrastructure 110. Alternatively, the link infrastructure 110 may be a loopback path. Notwithstanding, the link infrastructure may be, for example, a shielded twisted pair, an unshielded twisted pair (UTP), copper wire or optical fiber.
Typically, the multi-lane encoder 103 may accept raw data bytes from an upstream component of the digital communication system and encode the raw data bytes into a plurality of n parallel lanes 111a of coded words. The coded words may be specially designed to provide reliable transmission over the digital communication link 100. For example, standardized coding such as 4B5B or 8B10B coding may be utilized to ensure reliable transmission.
Once the raw bytes of data have been encoded, the resulting coded data may be multiplexed into a serial bit stream 109a by the high-speed serializer 104. The serial bit stream 109a may be transferred to the modulator 105 for processing. The modulator 105 may perform digital-to-analog conversion on the serial bit stream 109a, resulting in an analog equivalent bitstream 109b. The resulting analog serial bitstream 109b may be transferred to the receiver side 102 via the link infrastructure or loopback 110.
Once the analog serial bitstream 109b reaches the demodulator 106 on the receiver side 102, the demodulator 106 may perform an analog-to-digital conversion on the serial bit stream 109b, resulting in a serial digital bitstream 109c. The resulting serial digital bitstream 109c generated by the demodulator 106 may be transferred to the high-speed de-serializer 107. The de-serializer 107 may perform the opposite function of the serializer 104 and may translate the serial digital bitstream 109c back into a plurality of n parallel lanes 111b. The n parallel lanes 111b of data are then passed to the multi-lane decoder 108, which essentially performs the opposite function of the encoder 103 and translates the parallel lanes back into raw data bytes.
An example of a multi-lane protocol interface is a 10 Gigabit Attachment Unit Interface (XAUI). XAUI is a full duplex interface that may utilize four data lanes to achieve throughput of 10 gigabits per second. Each data lane may operate in parallel at speed of 3.125 gigabits per second to accommodate data and associated overhead which is generated by the 8B/10B coding that is utilized. The resulting data rate is therefore 10 gigabits per second.
FIG. 2 is a diagram that illustrates an example of a XAUI parallel lane structure 200 for 10 gigabit (10 G) BASE-X operation comprising four lanes. Referring to FIG. 2, the XAUI parallel lane structure 200 may include a first lane (lane 0), a second lane (lane 1), a third lane (lane 2) and a fourth lane (lane 3). The XAUI parallel lane structure 200 depicts the end of a first data packet 201, an inter-packet-gap (IPG) or idle 202 and a first portion of a second data packet 203.
The data word bytes in the data packets may be designated by /D/. The end-of-packet (EOP) word may be designated by the control character /T/ and may indicate the end of a data packet. The SOP (start-of-packet) word may be designated by the control character /S/ and may indicate the start of a data packet. The control character /K/ may indicate a comma and may be utilized for byte alignment. The control character /A/ may be utilized to indicate an alignment character that may used for lane alignment. The control character /R/ may indicate a carrier extend and may be utilized to separate packets within a burst of packets. In certain instances, the control character /R/ may be utilized for code-group alignment. In this regard, the control character /R/ may be used to ensure proper code-group alignment of a first idle character occurring after a packet has been transmitted. The IPG or idle packet 202 preferably includes control characters such as /A/, /K/, and /R/. Consequently, the IPG or idle packet 202 does not include data characters.
The various control characters in each of the parallel lanes, lane 0, lane 1, lane 2 and lane 3 may be part of the transmission protocol utilized by standardized 10 G BASE-X transmission. In accordance with current 10 G standards and protocols, there are 12 control characters or special code groups.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.